Citation

Abstract

Data ordering in large fast-Fourier transforms (FFT’s) is both conceptually and implementationally difficult. This article describes a method of visualizing data orderings as vectors of address bits, which enables the engineer to use more efficient data orderings and reduce double-buffer memory designs to single-buffer designs. In particular, this article details the difficulties and algorithmic solutions involved in FFT lengths up to 4 megasamples (Msamples) and sample rates up to 80 MHz. Although the particular solutions mentioned may be directly applicable only to the particular system for which they were intended, the methodology by which these solutions were found could be useful to anyone confronted with similar problems.

Details

Volume
42-108
Published
February 15, 1992
Pages
294–306
File Size
600.4 KB