Citation
Abstract
A general logic structure (GLS) for implementing arbitrary functions in integrated circuits has been described in a previous report. Density and reliability predictions for the GLS will be presented in this article. The GLS has been found to be more dense than programmed logic arrays (PLA) and certain configurations of “optimized” macros, Macro is used here to mean a predefined function that may be inserted into a design, A reliability model is presented that includes the possibility of undetected manufacturing flaws. This model is more accurate than models that consider only so-called wear-out failures, It may be used to indicate how much preinstallation test coverage is necessary to guarantee a given installed reliability.
Details
- Volume
- 42-53
- Published
- October 15, 1979
- Pages
- 66–73
- File Size
- 554.1 KB