Citation
Abstract
Three different finite field multipliers are presented: (1) a dual basis multiplier due to Berlekamp, (2) the Massey-Omura normal basis multiplier, and (3) the Scott-Tavares-Peppard standard basis multiplier. These algorithms are chosen because each has its own distinct features which apply most suitably in different areas. Finally, they are implemented on silicon chips with NMOS technology so that the multiplier most desirable for VLSI implementations can readily be ascertained.
Details
- Volume
- 42-90
- Published
- August 15, 1987
- Pages
- 63–75
- File Size
- 1.3 MB