Citation
Abstract
The Big Viterbi Decoder (BVD), capable of decoding convolutional codes with constraint lengths of up to 15, is under development for the DSN. As part of the development, a commercial single-chip (7,1/2) Viterbi decoder is used to enable early start of system integration. Tests of the integrated partial system (including simulator, input interfaces, output interfaces, and computer controls) were recently completed at the DSN Compatibility Test Area (CTA-21) at JPL. This article describes the system elements used for the demonstration and test results.
Details
- Volume
- 42-99
- Published
- November 15, 1989
- Pages
- 122–127
- File Size
- 244.8 KB